The present invention relates to a magnetic head drive circuit and, more particularly, to a magnetic head drive circuit for data write access in a hard or flexible disk drive in a data processing apparatus.
A dive current for a magnetic head must be reversed for data write access in a magnetic recording apparatus such as a hard or flexible disk drive. As shown in FIG. 3, a conventional magnetic head drive circuit for driving a magnetic head (e.g., a thin film head) having no center point of a winding comprises a bridge circuit 2 for current-driving a magnetic head 4 and a drive circuit 3 for driving the bridge circuit 2.
The bridge circuit 2 comprises series-connected bipolar transistors Q21 and Q23 having an output terminal O1 at their connecting node, and series-connected bipolar transistors Q22 and Q24 having an output terminal O2 at their connecting node. The collectors of the bipolar transistors Q21 and Q22 are commonly connected, and the common node is connected to a power supply VCC. The emitters of the transistors Q23 and Q24 are commonly connected, and the common node is connected to ground G through a constant current source I21. The constant current source I21 comprises a transistor Q25 controlled by a reference current source RI21 constituted by an input circuit as a current mirror circuit (not shown) and a resistor R21 connected between the emitter of the transistor Q25 and the ground G.
The drive circuit 3 comprises transistors Q31 and Q32 constituting a differential amplifier and having load resistors R31 and R32 connected to a power supply VCC, a constant current source I31 connected to the common node of the emitters of the transistors Q31 and Q32, switching signal sources S31 and S32 having bases for receiving rectangular wave switching signals having the same amplitude but opposite polarities, and a bias power supply VB31. The constant current source I31 comprises a transistor Q33 controlled by the reference current source RI31 and a resistor R33 connected between the emitter of the transistor Q33 and the ground G.
The collectors of the transistors Q31 and Q32 of the drive circuit 3 are respectively connected to the bases of the transistors Q21 and Q22 of the bridge circuit 2. The bases of the transistors Q31 and Q32 of the drive circuit 3 are respectively connected to the bases of the transistors Q23 and Q24 of the bridge circuit 2.
An operation of the conventional magnetic head drive circuit will be described below.
When the output polarity of the switching signal source S31 is positive (about 0.25 V) and the output polarity of the switching signal source S32 is negative, the transistors Q23 and Q24 constituting the differential amplifier of the bridge circuit 2 are turned on and off, respectively. An output current from the constant current source I21 entirely serves as an emitter current of the transistor Q23, and a collector current therefrom has almost the same magnitude as that of the emitter current. At the same time, the transistors Q31 and Q32 constituting the differential amplifier of the drive circuit 3 are turned on and off, respectively. An output current from the constant current source I31 entirely serves as an emitter current of the transistor Q31, and a collector current therefrom has almost the same magnitude as that of the emitter current. Although a voltage drop occurs across the load resistor R31 of the transistor Q31, a voltage drop does not occur across the load resistor R32 of the transistor Q32. The base potential of the transistor Q21 in the bridge circuit 2 is set lower than that of the transistor Q22. The DC resistance of the magnetic head 4 is regarded as almost zero, so that the output terminals O1 and O2 are short-circuited. The emitters of the transistors Q21 and Q22 are commonly connected in a DC manner to constitute a differential amplifier. For this reason, the transistor Q21 is turned off, and the transistor Q22 is turned on. Therefore, a drive current for the magnetic head 4 flows from the power supply VCC to the constant current source I21 through the transistor Q22, the output terminal O2, the magnetic head 4, the output terminal O1, and the transistor 21 in the order named.
When the output polarity of the switching signal source S32 is positive and the output polarity of the switching signal source S31 is negative, the ON/OFF states of the transistors Q21 and Q22 and the transistors Q23 and Q24 of the bridge circuit which constitute differential amplifiers and the transistors Q31 and Q32 of the drive circuit 3 are reversed. Therefore, the direction of the drive current for the magnetic head 4 is reversed.
The operation in the normal state has been described above. In a transient state upon reversing the direction of the drive current, the following problem is posed.
Assume that the transistors Q21 and Q24 of the bridge circuit 2 are set in an ON state, and that a drive current flows from the output terminal 01 to the output terminal 02 through the magnetic head 4. When the output polarities of the switching signal sources S31 and S32 are reversed to reverse the direction of the drive current, the transistor Q24 is turned off, and at the same time the transistor Q23 is turned on, so that the current from the output terminal O2 tends to be drawn. At this time, a flyback pulse as a pulsed voltage which decreases the voltage at the output terminal O1 and increases the voltage at the output terminal O2 is generated by the inductance of the magnetic head 4. The collector potential of the transistor Q23 set in the ON state is decreased and finally saturated to disable drawing of the drive current. In the normal state, the emitter potential of the transistor 22 set in the ON state is also increased and turned off, and the transistor Q21 whose emitter current is decreased is undesirably turned on. This state is called a flyback pulse clamp.
In a magnetic recording apparatus of this type, the output voltage of the magnetic head in the read mode is generally increased and interference between the recording signals is generally minimized at a higher reversing speed of the drive current in the write mode of the magnetic head. For this reason, an error rate is decreased, and the recording density can be increased. The flyback pulse clamp must be prevented to increase the reversing speed of the drive current.
The limit of turning on the transistor Q22 of the bridge circuit 2 is its emitter potential defined by subtracting the base-emitter voltage (i.e., 0.75 V) of the transistor Q22 in the ON state from the voltage of the power supply VCC. For example, if the voltage of the power supply VCC is given as 5 V, this emitter potential is 4.25 V or less. A voltage across the resistor R21 and a collector-emitter voltage of the transistor Q25 must be set to 0.3 V and 0.5 V, respectively, in normal design so as to normally operate the constant current source I21. The minimum collector potential of the transistor Q25 must be 0.8 V. A collector-emitter voltage which operates the transistor Q24 without saturation is 0.5 V. The minimum collector potential of the transistor Q24 becomes 1.5 V because a margin for properly turning on the transistor Q24 as 0.2 V is added. As a result, the limit of preventing the flyback pulse clamp occurring in the magnetic head 4 so as to keep the transistors Q22 and Q24 on is 2.75 V (=4.25 V-1.5 V).
In the conventional magnetic head drive circuit described above, the voltage at which the flyback pulse generated by the inductance of the magnetic head is clamped is low, and it is therefore difficult to increase the reversing speed of the magnetic head drive current so as to increase the write speed.